Friday 9 September 2016

PCB Routing guidelines - Part 2

Difference between Power Plane and Power Bus:


Layout engineers face different challenges in the real world. One of the biggest challenge is routing the power lines. A board with bigger stack up (meant more layers) will have a chance for separate power plane. Anyways with the present day board densities, and push for low cost designs, push for lesser number of layers is always on the cards. It is always a wise decision by the product management team to give the required freedom to the layout engineer as he is also a critical stakeholder for the product.
           Designs will always have more than one power rail to be routed on the board. PCB layout doesn't have enough space to have a single layer for each power rail. so, in the stack up power plane will be defined in one of the layer with a return path as ground in the next layer. The power plane will be split to accommodate the different power rails. It is the design strategy that need to be planned by the PCB layout engineer to have enough plane for each power rail to accommodate the current requirement. 
              Most of the times we have been talking about the space to route power rail on a separate plane. But this is not the case in smaller designs like for example, a 2-layer, 4-layer and sometimes 6-layer board. In this case, power rails can't have a separate plane but they have to routed as thicker traces to allow sufficient current to flow. 

The main disadvantage with power bus routing can be explained by a simple example:

Let us assume that a 5V rail is routed as power bus from the source to 3 chipsets. The following are the parameters defined in this scenario:

Voltage rail = 5V
Power Bus resistance = 200mohm (mainly because of trace width)
Each chip requires current = 1.5A, so, a total of 1.5*3 = 4.5A
So, 4.5A should flow through the power bus of 200mohm
Drop across power bus = 200mohm * 4.5 = 0.9V
That means, in power bus routing with above example, the 3rd device in the chain will only see 5-0.9 = 4.1V, which may not be sufficient excitation in most of the times.


As per the design rule, as trace width increases, impedance reduces. As impedance reduces, the drop reduces. This meant for power rails, we must have a wider plane to eliminate any drop due to trace routing. This is a clear indication that it is always safer to have power plane rather than having power bus and then distributing power to various devices on the board.


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