PCB Routing guidelines - Part 4

USB is found in computers, tablets, mobiles, laptops, electronic equipment, modern gateways, servers and in many electronics devices. There are several versions of USB evolved over a period of time like all communication interfaces. Among them USB2.0 might be getting older now with USB3.0 coming up in the new electronic devices but it is most widely used communication interface in the embedded world. For the designer information, USB2.0 is called high speed USB and USB3.0 is called Super speed USB. USB2.0 operates around 480Mbps speed whereas USB3.0 operates at a maximum of 5Gbps speed. The following are the most important considerations for a layout engineer to consider before jumping into the layout activity.

1. Stack up -  with indication of USB signal routing layers
2. Impedance controlled routing
3. Trace width
4. Trace separation
5. Termination resistor placement
6. Trace length
7. Grounding considerations
8. Supply filtering
9. Other EMI/EMC considerations
10. USB controller placement
11. Layer splits and any voids

USB uses differential signaling for data transmission and all the above points are to be thoroughly listed for the routing and analyzed in depth before starting the routing. Whatever may be the routing techniques involved, maintaining the given signal quality is the ultimate goal. Let us look in this article the routing guidelines for the high speed USB.

1. Route the differential signals with as smaller lengths as possible.
2. Place the termination resistor as close as possible to the origin of USB signals.. In most cases, host is the originator, so, keep as close as possible to the host.
3. Proper length matching to be achieved with the USB signals. This meant two traces D+,D- should have same length. (mismatch must be < 150 mils)
4. Signals should have a continuous ground plane to maintain proper impedance, USB signals should always be routed as impedance controlled.
5. Never route the USB signals under clock generators, crystals, oscillators.
6. Ensure proper separation between USB differential signals during the break out or terminating to the connector. the spacing between the signals determine the impedance.
7. USB signals should not cross any power/ground splits. If they cross that enables the return path to take a longer route which is like increasing the ground loop causing necessary signal integrity issues.
8. Route the USB signals in a strip line topology. This meant that they must be routed in the inner layers to avoid any EMI issues in the system.
9. While routing in the inner layers, take care that there are minimum vias. As the number of vias increases, impedance mismatch occurs and hence reflections leading to signal degradation.
10. Avoid right angle bends at the corners, this causes reflections. Have a smoother routing with < 45 deg routing near the corners.
11. USB signals should have sufficient spacing from high speed clocks and periodic signals to avoid any signal coupling.
12. USB signals should not have any stubs. Stub at any point causes impedance discontinuity. Generally, for testing signals people tend to have a small stub with a test point. In such cases, don't have a stub more than 100 mils.
13. Route the signals away from the board edges to avoid unnecessary coupling with the loose cables surrounding the system.
14. Route signals with 90 ohms differential impedance as per USB standard.
15. Follow the trace width specified by your manufacturer for achieving the USB standard impedance.
16. Common mode choke must be placed as close as possible to the USB connector. Common mode chokes are used to filter common mode electromagnetic interference (EMI) currents without de-rating under high currents and without causing signal degradation.
17. Effects of Split plane crossing can minimized by having stitching capacitors near by. 

High speed Designs - Part 5

To eliminate Signal Integrity issues on the board,

1. Signals must be routed with good impedance control.

Impedance controlled routing is one of the important requirement in the high speed board designs. This involves routing done on the PCB with a single impedance across the board. The reason why impedance control is important is to eliminate the signal integrity issues because of different impedance values. The signals have different trace widths in different layers to achieve the same impedance for the signal in all layers. This need to be adhered to for reliable channel communication.

2. Follow proper design guidelines

Every component we have selected has a datasheet, design guidelines every engineer has to follow during their design. The component vendor would have done a thorough review/analysis before releasing their chip set/component. Follow the recommendations for a successful. Some times you might have to deviate from the guidelines, in such cases it always important to simulate the design before going ahead with the next steps.

3. Simulate the design

Simulation is the most important step in the design to evaluate the performance of the design before taking it to the fabrication. The simulation will be done before as well as after the layout. This helps us to predict and eliminate the signal integrity and power integrity issues that may come on the board. Hyper Lynx is the widely used tool in this scenario.

4. Routing to eliminate EMI/EMC issues

Certification is the most important step for the product. Certification is directly the product performance under various external conditions. In the first we have discussed about the impedance control in PCB routing, on the same lines, there are several other routing guidelines that need to be followed, like for example, routing most of the high frequency signals in in the inner layers with proper reference plane, proper power supply design architecture, careful component selection, eliminating leakages, proper shielding techniques, etc.

We will discuss on the other guidelines in the future articles.

PCB Routing guidelines - Part 3

Clock is the most important signal in any electronics design. This is the signal that helps the entire board to be in sync. Routing of clock is critical to the board performance and hence system functionality. There are several guidelines defined for the clock signal for best performance. The timing of the circuit depends on the clock signal. The rising/falling edge of the signal is critical as that helps to trigger the electronics circuit performance. It is rather important to take care of pulse edge than the entire pulse width.

Let us have a look at the guidelines for routing a single ended clock on a PCB:

1. The clock traces should be routed as straight as possible without any bends.

2. In case, bends can't be avoided, avoid right angle/sharp bends. 

3. Try to route the clock as arc at the bends.

Reason: Sharp bends causes reflections, affecting the integrity of the signal.

4. Never route the clock signals on the different layers. This will increase the number of vias. 

5. In the present day scenario of denser boards, clocks can't be routed in single layer. In such cases, take care that clock routing is done in not more than 2 layers.

Reason: vias result in impedance mismatch and causes reflections, affecting the integrity of the signal. Also low losses on the clock signal if lesser number of vias. increased delays because of vias.

6. When a top or bottom layer is used for clock routing, the immediate layer must be a ground. This improves the return path continuity and reduces EMI on the board.

7. When routed in the inner layers, the top and bottom layer of that inner layer must be ground. This eliminates any emissions.

8. Clocks must always be routed point-to-point. Any branches on clock signal will lead to catastrophic signal events.

9. It is always preferred to do pre and post layout analysis on the clock signal and apply proper termination.

10. If the clock is routed only on the top/bottom layer, try to have a guard trace around the clock. In case, space doesn't permit have enough spacing to clock from other signals. (Note: Maintain a spacing of 3X the width of the clock signal)

11. It is always preferred to route clock signal as short as possible.

12. Ensure proper return path for the clock signal to avoid longer return paths on the ground.

13.  If clock signal is routed in the inner layer, timing analysis is to be done. This is very essential for high frequency clocks.

14. Crystal and load capacitors should be as close as possible to the crystal Xin and Xout pins.

Clock signal routing is a trade-off. There will be a lot of debate whether to route on the top layer to avoid losses/reflections or to route in the inner layer to help emission on the board. but preferably, high speed clocks should always be routed in the inner layers.

High speed Designs - Part 4

One of the challenging aspects in the high speed board design is the selection of the PCB material. At low frequencies, the characteristics of the PCB material are of less significance as the signal characteristics doesn't change with type of material. But when it comes to high frequencies, dielectric material properties always a crucial role in the electrical performance. As most of us worked on low frequencies, the most available, cheap and widely used laminate material is FR4. The characteristics of FR4 does not allow it to be used for high frequencies. To decide on which material works best for a given frequency, we have to check out the specifications of the material datasheet as we do for the component selection. One more approach by the design engineers and fab houses is to use some simulation tool to decide the material characteristics to be used for a given scenario.

           The circuit designs range from low frequency digital and analog type to a high frequency digital and RF designs. As designers, we understand that characteristics of high speed digital and RF/microwave circuits differ a lot. So, in dielectric selection, considering the signal type is of primary importance and we understand that even in the high frequency domain, not all signal types will use the same laminate material. For a high frequency digital signal, the tolerance is more than the RF/Microwave. So, component selection for  RF/Microwave is more critical.

               As designers, we have to understand that quality should be the prime motto and the timeline for the project delivery must follow it. As a quality check, thorough analysis of application vs dielectric type to be used is a must and some significant amount of time must be spent on this. 

What are the material characteristics that need to be considered for selecting a laminate material?

1. Dielectric constant
2. Dielectric thickness
3. Loss tangent
4. Impedance characteristic
5. Temperature curve
6. Cost

Effects of  improper dielectric material selection:

1.  Impedance mismatch and hence reflection
2. Dielectric loss (signal loss in the material) - Skin effect

Impedance of the material seen by the signal varies as per the signal frequency. Also, with temperature the impedance varies. Another major factor is the process variation by different fab vendors resulting in minute variations which can create signal losses post fabrication.

The below are the dielectric materials preferred for high frequency applications:

1. Nelco 4000 
2. Rogers 4350

The below figure describes the core and pre-peg terminologies in a stack up.

PCB Routing guidelines - Part 2

Difference between Power Plane and Power Bus:

Layout engineers face different challenges in the real world. One of the biggest challenge is routing the power lines. A board with bigger stack up (meant more layers) will have a chance for separate power plane. Anyways with the present day board densities, and push for low cost designs, push for lesser number of layers is always on the cards. It is always a wise decision by the product management team to give the required freedom to the layout engineer as he is also a critical stakeholder for the product.

           Designs will always have more than one power rail to be routed on the board. PCB layout doesn't have enough space to have a single layer for each power rail. so, in the stack up power plane will be defined in one of the layer with a return path as ground in the next layer. The power plane will be split to accommodate the different power rails. It is the design strategy that need to be planned by the PCB layout engineer to have enough plane for each power rail to accommodate the current requirement. 

              Most of the times we have been talking about the space to route power rail on a separate plane. But this is not the case in smaller designs like for example, a 2-layer, 4-layer and sometimes 6-layer board. In this case, power rails can't have a separate plane but they have to routed as thicker traces to allow sufficient current to flow. 

The main disadvantage with power bus routing can be explained by a simple example:

Let us assume that a 5V rail is routed as power bus from the source to 3 chipsets. The following are the parameters defined in this scenario:

Voltage rail = 5V

Power Bus resistance = 200mohm (mainly because of trace width)

Each chip requires current = 1.5A, so, a total of 1.5*3 = 4.5A

So, 4.5A should flow through the power bus of 200mohm

Drop across power bus = 200mohm * 4.5 = 0.9V

That means, in power bus routing with above example, the 3rd device in the chain will only see 5-0.9 = 4.1V, which may not be sufficient excitation in most of the times.

As per the design rule, as trace width increases, impedance reduces. As impedance reduces, the drop reduces. This meant for power rails, we must have a wider plane to eliminate any drop due to trace routing. This is a clear indication that it is always safer to have power plane rather than having power bus and then distributing power to various devices on the board.

Understanding Boost Regulator

As the name suggests, Boost Regulator is a power supply component that boosts the input voltage to a desired value. Let us take a alkaline battery which gives a voltage of 1.5V.  In case, the circuit has to be operated at 3.3V, we have to use a boost converter in between to boost to a desired voltage of 3.3V. The basic boost converter circuit principle is based on the following circuit:

As shown in the above basic circuit of Boost converter, the main component in the Boost circuit are Inductor, Switch and a diode. The switch must be a low resistance semi-conductor device like a MOSFET.

Operation of the above circuit:

1. When the switch 'S' is closed, the current passes through the inductor through the switch 'S'. The inductor charges with + at the source side and - at the switch side. The inductor generates a magnetic field around it.
2. Once the switch is open, no current passes though switch 'S'. The charged inductor slowly discharges and the current now passes through the Diode 'D' to the load. The resultant current to the load increases as the source will be adding to the inductor current.
3. By the time inductor fully discharges, if the switch is closed, the inductor charges again. As the inductor is not allowed to discharge fully, the voltage across the load seen is sum of source voltage and inductor voltage. This meant that the output voltage is always greater than the source voltage.
4. The capacitor 'C' supplies to the load when the switch is closed. the diode in this case acts as blocking diode not allowing any current from capacitor pass through to the switch side.
5. So, when switch is closed, capacitor supplies to the load and when the switch is open, source+inductor supplies to the load and also charges the capacitor.
6. Input filter requirements are little relaxed as the supply sees a constant inductor load and there isn't discontinuous currents and need for filtering.

The diode used in this circuit is called "fly-back" diode. The fly-back diode is sometimes replaced by another low-resistance switch in low power applications. This is to avoid the diode losses.

The following parameters are to be checked while selecting a Boost converter:

1. Input voltage range
2. Output voltage (fixed/adjustable)
3. Output current
4. Switching frequency
5. Efficiency
6. Maximum switch current
7. Mosfet internal resistance
8. Quiescent current

All the above parameters are available from the datasheet of the boost converter ic.

Some of the important points of boost converter:

1. As the input voltage is reduced for a given fixed output voltage, the current drawn by the switch of the Boost converter increases, in this case the efficiency of the boost converter is less. The below figure from the data sheet of boost converter IC LM2621 illustrates the same:

2. At low load current conditions, the ripple current causes the inductor to discharge more quickly. This is the condition during which the modern step-up converters manage by varying the switching frequency.

Analog Circuits - PCB surface leakage current

The latest opamps in the market have good offset performance and very low bias currents. The bias current will be of the order of the 1pA and even of the order of fA. Take for example the latest precision opamp LMP7721 from Texas Instruments which has input bias current as low as 3fA. This is very low and requires very good layout design to take advantage of the good offset and drift performance.

                Leakage effect is one of the primary concerns in such circuits. The leakage can be through the PCB crosstalk which can easily draw more current than the input current drawn by the opamp pins. This is more prevalent in the high temperature and high voltage applications. Over a period of time the dust, humidity and other impurities formed over the PCB aggravates the problem and should be taken care with good layout practices. The impurities that we are talking here can be a flux residue which is left over due to improper PCB cleaning techniques. So, the following procedures are must in such critical applications:

1.       Surface coating on the PCB to avoid humidity, dust accumulation

2.       Using high quality dielectric materials

3.       Proper PCB cleaning techniques

4.       Good layout techniques

Example scenario:

Take for example a PCB trace whose impedance w.r.t given trace nearby is 110K and a 3.3V is applied across the main trace. In this case the current passing across that junction would be 30uA. If the input bias current of an opamp is comparable with this current, then definitely the circuit will misbehave. In such cases we have implement the following technique to avoid that leakage:

Have a guard trace around the trace carrying low current. This guard trace must have a potential very close to main trace. The below snapshot shows guard ring recommendation for the LMC6001 Ultra, Ultra-Low Input Current Amplifier.

Zigbee vs Zwave

PCB Fabrication and SMT Assembly - 2

For a beginner in electronics circuit design, there is always a bit of confusion regarding the manufacturing costs of PCB. We will always be looking for a common place where we can find the costs involving PCB fabrication and also factors to be considered while designing the same. So, once the layout engineer is ready with his Gerber, the designers will start looking for various fab options. They will be sending the Gerber to fab houses to get a quotation for the PCB fabrication. During the information exchange between companies and fab houses lot of technical information gets exchanged which finally decides the PCB fabrication cost. Following are the few points you have to look at before the PCB fabrication cost is decided.

1. PCB dimensions

2. Quanity required

3. Layer count of PCB

4. Fabrication material

5. PCB thickness

6. copper foil thickness on the PCB

7. Any special treatment required for the PCB

8. Trace width and line-to-line spacing

9. Via count and dimensions

10. Special PCB sizes

CNC machine

Are you a start up in the electronics industry? Tired of turn around times for the PCBs from the manufacturing houses? Thinking of doing a PCB prototypes by yourselves with a small setup? Thinking that fabricating a PCB using chemicals can be a messy job? Then CNC machine must be one of your choices.

               CNC short form for computer numerical control. These types of machines work automatically as per the instructions provided by the user. The manual techniques used in high production environments are long one and are replaced by CNC machines. Consider the PCB fabrication process where milling is done to create the signal routing patterns. PCB drilling, routing and engraving are done using CNC machines which can bring the prototypes out quickly and at a very low cost if done in-house. The CNC machine comprises of the mini computer or the microcomputer that acts as the controller unit of the machine. The existing CNC machines involve inputting a PCB Gerber where in the complete PCB process will be automatically done through a single machine. The entire process can be monitored over a well-defined GUI. The options when using a CNC machine is used involves checking of PCB material to be etched, drill bit to be used on the machine, the PCB tools (in fact output of PCB tools) supported by the CNC machine. the drill depth can be automated in the tool. The drill position is controlled through a well calibrated motors which meant no chance of any error. The RPM of the machine can be up to 110,000. Copper clad board is used instead of photo-resistant board. Here we are eliminating hazardous chemicals during the process. The process with CNC machine might be slow than normal etching but is always a quality and better environmental friendly option.

Few CNC machine vendors are:

1. Indus, INDIA

2.  Zen Tool works

3. Accurate CNC

4. Sahajanand

5. Advanced Technocracy Inc.

There are several manufacturers from China to check out.

High speed Designs - Part 3

Transmission lines is the first term when you hear while starting to work on high speed designs. Transmission line In PCB terminology, transmission line is a trace that connects various chips on the board. The transmission circuit is generally visualized as RLC circuit. The frequency response of any circuit depends on the R-L-C elements and they become predominant when used at high frequencies. 

Traditionally, engineers used interfaces like SPI, I2C, UART which are low speed interfaces. These interfaces didn't have issues with transmission line effects of the PCB traces. Unless the signals are routed over permitted lengths, there is no issue with maintaining the integrity of the signal. As signal frequencies increased, beyond 100MHz, with interfaces like Gigabit Ethernet, DDR, PCIe, etc the transmission line effects have to be considered. We generally read in design guidelines that the signal can't be routed for example, more than 1 inch and also the signal should have a recommended routing in the PCB, etc in the case of high speed signals. So, for a high speed signal even if you route shortest but don't take care of the recommended PCB routing guideline, you might end up with signal having signal integrity issues. Some of the major issues that we come across while working with high speed designs are:

Impedance mismatch

Reflections - overshoot, undershoot, ringing

cross-talk

Radiation

The basis of signal transmission comes from Maximum power transfer theorem of electrical circuit. This theorem states that the maximum power will be transferred from source to load when the source impedance matches the load impedance. If there is a mismatch, then power transferred to load gets reduced which meant there is more loss. In high speed design, when such scenario comes up, the source tries to send the signal to load and load will not be able to absorb the complete signal. Some part of the signal is reflected back to the source. This is what causes the reflections on the PCB. the signal when reflected back travels to source is reflected as there is a mismatch again. The signal hence forth travels between source and load while degrading over time. When these occur, the reflected signal adds/negates with the original signal causing the actual signal amplitude to increase/decrease. This is what we call undershoot/overshoot in high speed domain. 

PCB Fabrication and SMT Assembly - 1

Listed are the few tips for your PCB fabrication and assembly.

CEM-1, CEM-3 as base material for PCB is low cost and not widely used now. this is not used any more. Following are the current material categories for the printed circuit board: 

• FR4, 
• High TG FR4, 
• Halogen Free Material, 
• Aluminum based material, 
• Copper based material, 
• High frequency material,
• PTFE material
• Heavy copper foil
• Paperphenolic plate
• BT
• PI
• Composite material
• PTFE + metal based
• Roger HF material

2. When finished copper thickness is equal to or more than 3 OZ, immersion gold as surface treatment is advised.

3. If the solder mask color is white, the PCBA boards may need washing.

Our PCB Tech. has good pre-sale design service and also good after-sale service. Please, do send your queries using below link:

https://ourpcb.wufoo.com/forms/instant-quote-form/

 ----- This post is contributed by Lillian from OurPCB Tech. Ltd

Battery charging Basics - 3

In the previous scenario, we have seen battery life time before it must be replaced or before it must be recharged. The condition was that there is a constant current drawn by the load for an hour. In a real time scenario, that is not the case. There will be a sudden current drawn by the load and it remains in sleep for a long period of time. This can be a case in latest IoT (Internet of things) products.

The battery calculations are done this way:

Let us assume, the following conditions for the circuit shown in the previous post:

Switcher output = 1V

Load Current = 1A

So, total power = 1W

For a given efficiency of switcher of 80%, Input power = Output Power/Efficiency = 1/0.8 = 1.25W

For a power of 1.25W at the input, current  = Power/Voltage = 1.25/7.4 = 0.169A

So, in addition, let us assume a condition when the load is drawing current of 0.169A every 10 minutes in a given hour. Considering this scenario, the current of 0.169A will be drawn 7 times an hour and negligible current for the other time.

So, in such case average current drawn by circuit from load is, 0.169*(7/(7+6)) = 0.091A

So, a 7.4V battery with 3200mAh battery capacity supplying 0.091A to load for 1 hour can withstand for, 

3.2/0.091 ~ 35 hours 

The commonly used  terminology here is the duty cycle which is calculated by the formula, T_ON/ T_ON+ T_OFF

Electromagnetic Compatibility - 2

EMI caused on the board can be radiated as well as conducted. The major reasons are power density, faster switching, higher currents. EMI basically occurs because of unwanted coupling of signals that happen in circuits.

In digital circuits, the interference can be on-board. In these cases we provide isolation between each section in the board to eliminate interference. But if the interference is from external source, we have to use mechanism like EMI filter. The noise is dominant in the higher frequencies and hence a low pass filter can also be used to shutout the noise completely. Other than this as discussed, magnetic component like inductor can also be used. To eliminate noise completely and to handle differential and common mode noise, EMI filter is the best. EMI filter is generally used to eliminate low frequency conducted noise in the circuit where as we use techniques like shielding to eliminate radiated high frequency emissions.

We have to understand that the main cause of conducted emission and hence conducted interference comes from transients, ripple that are generated out of common power supplies. The noise couples over the power path. As we talk about the transients here, which meant sudden change, we can come to a conclusion that we have to use magnetic devices that doesn’t allow sudden change in current.

There are various regulations that define the acceptance levels of this noise. The noise here can be classified into natural and artificial. ESD, lightning come under natural noise sources. The noise emitted from electronic devices come under artificial noise. The conductive emission that we are talking here is an artificial noise.

Natural noise sources - Surge voltages from lighting

Artificial noise sources - switching transients, crosstalk in transmission lines, transients in power supply lines

EMI filter is one of the commonly used passive device for protection against the interference that is generated externally as well as within the device. EMI filter protects the device from conducted interference. We always read through power supply specifications especially SMPS and read that it has an inbuilt EMI filter. This EMI filters suppress common mode as well as differential mode noise. Even though we talk only about supply here there are many instances where EMI filter is used.

The different selection criteria for EMI filter are:

• Current carrying capability
•  Impedance
• Maximum DC resistance
• Form factor of the filter
• Capacitance

The various types of EMI filters that can be used for eliminating differential mode noise are:

• Pi filter
• T filter
• L filter

The various types of EMI filters that can be used for eliminating common mode noise are:

• Common mode choke 

EMI filters are used in the following applications:

• USB, Ethernet lines
• AC adaptors
• Power supply input

The various vendors that supply EMI filters are:

• TDK
• MURATA
• PANASONIC
• TE

Some of the EMI/EMC standards:

• CISPR/EN (standard for products used in Europe, Ex: CISPR22, EN55022 which is meant for computing applications)
•  EN61000 (Ex: EN61000-3-2 for applications < 16A)
• FCC (standard for products used in US, Ex: FCC part 15 class B which is meant for unintentional radiators)

Battery charging Basics - 2

The main challenge for any system in a battery powered system is the battery withstanding time. For example if you have the following system:

The battery calculations are done this way:

Let us assume, the following conditions for the above circuit:

Switcher output = 1V

Load Current = 1A

So, total power = 1W

For a given efficiency of switcher of 80%, Input power = Output Power/Efficiency = 1/0.8 = 1.25W

For a power of 1.25W at the input, current  = Power/Voltage = 1.25/7.4 = 0.169A

So, a 7.4V battery with 3200mAh battery capacity supplying 0.169A to load can withstand for,

3.2/0.169 ~ 19 hours 

USB 3.1 SuperSpeed

We have few personal computers in our houses where they host the USB1.0. The technology has raced ahead and the latest USB standard available is the USB3.1. We all know that USB2.0 works at 480Mbps. But now the USB3.1 works up to 10Gb/s which is called a super speed USB connectivity. We will start seeing PCs and mobiles with these USB3.1 ports in the very near future. USB3.1 basically extends the present existing USB3.0 port standard to a high level, there by almost doubling the speed of the interface. With thunderbolt being implemented on main scale PC devices, at 20Gb/s, USB3.1 speed is comparatively low. there are two versions of USB3.1 stardard named Gen 1 and Gen 2.

Advantages of USB3.1 connectivity:

1. Faster speeds

2. Back ward compatible

3. Power efficient

4. The connector supports 20V/5A for a total of 100W

5. Type C cable is used which is easily pluggable

Practical implementations:

1. USB3.1 or any other technology can never achieve the maximum speed it has been designed for. The cables used and their lengths limit the speed of the technology.

2. The processors should be designed to support this new USB3.1 standard.

3. USB3.1 is compatible with USB Type C standard

4. USB3.1 Gen 1 supports 5Gb/s whereas USB3.1 Gen 2 supports 10Gb/s

5. storage devices that require more data and more speeds may implement USB3.1 technology

What is the difference when it comes to USB2.0?

1. USB2.0 has 1 differential pairs with transactions possible in only one direction. Can be said half-duplex.so, there are in total 2 lines for data transmission in USB2.0. where as the USB3.1 standard uses 2 differential signals (1 Tx, 1 Rx) in addition to USB2.0. So, there are in total 6 signal lines in USB3.1.

2. The transactions between host and device can happen in only one direction in USB2.0 where as the data transmission happens in both directions in USB2.0.

Want to buy an evaluation board with USB3.1 included? check the below link:

http://www.asus.com/microsite/mb/best_usb31_solutions/

https://www.asus.com/Motherboards/H170-PRO-USB-3-1/

http://www.asus.com/Motherboards/RAMPAGE_V_EXTREMEU31/

The above link shows a motherboard available from ASUS with USB3.1 connectivity. The RAMPAGE board from ASUS mounts a Intel Core i7 processor on LGA 2011-v3 socket

Universal Flash Storage (UFS2.0)

Are you buying a mobile or tablet? One of the major specifications that you look at is the storage. The need for memory in embedded products is vital. So, memory is a must in embedded products. We always here of eMMC card that is used in these systems. The memory that we are talking about here is NAND type and this is the type of memory that is used for storage as it is the cheapest memories available. The newest memory interface that the latest processors have to connect memory interfaces is UFS.

UFS is a universal flash storage interface in processors for connecting external memory. UFS is a next generation JEDEC flash memory standard. UFS is a successor to eMMC standard that is commonly used. The removal memory in the embedded systems are interfaces using this interface. The previous eMMC standard uses parallel interface where as the UFS uses serial differential interface for connectivity. The serial differential interface is basically a LVDS signalling method used. On most of the latest mobile processors, you find the UFS interface. The UFS is basically a full-duplex interface. As the interface is full-duplex, this will have separate lines for read and write making it the fastest interface.With UFS we can say that the speed/performance of SSD is combined with storage capacity of eMMC. The speed of UFS based memories can be up to 1200MBps.So, we can achieve the same speed with UFS as well.

The present version of UFS is 2.0. 

Why is UFS preferred?

1. The sequential read/write speeds are high (Faster response times)

2. Lower power consumption.

3. Higher storage bandwidth (Memory density)

4. Lesser space required on PCB for routing

5. Bi-directional transfer

6. The commands are queued which helps for parallel processing

7. Lower latency than eMMC interface

The latest Snapdragon 820 processors have the UFS2.0 interface.

High speed Designs - Part 2

Eye Diagram in communications field is one of the indicator of channel performance. The quality of the signal and in turn channel can be explained by the eye diagram. the eye diagram is a source to analyze the high speed designs. An eye diagram is formed by overlaying of number of bits that are transmitted across the channel. An eye diagram is a pattern that is formed in an oscilloscope which resembles the shape of an eye. If you have validated or performed any certification of high speed interfaces like PCIe, USB, etc., then you know well that eye diagram is very crucial to such analysis. In such certifications/validation a fixed data pattern is transmitted from the scope and received back. Example of such patterns is PRBS. Eye diagram basically is a voltage/time samples of the actual data. the eye diagram is representation of some million samples of data patterns captured. Oscilloscope is to be used in persistence mode to capture the sequence of samples.

What can be measured using an eye diagram?

1. Rise Time

2. Fall Time

3. Jitter

4. Over shoot

5. undershoot

6. Bit error rate

7. Cross talk

8. Inter symbol interference

9. Signal-to-Noise Ratio

What do we do/How do we analyze using eye diagram?

1. When we are measuring a interface performance, like for example, USB, we have to determine the acceptable levels of signal that help for exact reproduction of the signal at the receiver. For this we draw a small diagram called eye mask. If the generated eye diagram is well beyond this eye mask, then channel is performing well and doesn't have any signal integrity issues. If any of the eye diagram overlaps eye mask then there is a serious issue in the channel.

2. An eye opening (so called height of the eye or peak-to-peak value) is an indication of the channel performance. If an eye diagram generated is observed to be closed, then there is signal integrity issue in the channel.

3. The overshoot and undershoot indicates the impedance mismatch that is present in the channel because of which reflections occurred.

4. The eye width indicates the unit interval, and is an indication of any jitter present in the channel.

The basic test setup for generating eye diagram is:

The following image is a capture of eye diagram. Snapshot is taken from edn.com/keysight.com to give a view of the eye diagram analysis and capture.

Definitions used in eye diagram:

One level: The highest level (logic high voltage) in a peak-to-peak representation of the signal

Zero level: The lowest level (logic low voltage) in a peak-to-peak representation of the signal

Amplitude: The difference between one level and zero level.

Eye Height: Indication of eye opening. Under ideal conditions, Amplitude is equal to eye height. 

Eye crossing: Indication of jitter that is present in the channel.

Disadvantages of eye diagram:

1. Eye diagram can only judge but can't guarantee the channel performance.

2. Eye diagram is generally captured with a standard data pattern but in real time the pattern can vary.

3. Eye diagram can't determine the actual cause of the signal degradation in the channel.

Analog Circuits - Logarithmic Amplifier

There are various applications of op-amps. One of the important circuits using op-amp circuits is logarithmic amplifier. In logarithmic amplifier, the output is natural log of input signal.  the input signal can be a simple voltage. The basic equation that describes the logarithmic amplifier output is,

Vout = K * ln (Vin), K is gain of logarithmic amplifier

As we are saying logarithmic, this op-amp circuit is non-linear. So, a logarithmic amplifier converts linear voltage to non-linear. The main advantage of logarithmic amplifier is the dynamic range compression. So, if we have a very large dynamic range, it can be manipulated using a logarithmic amplifier.

The basic logarithmic amplifier circuit with diode is:

The basic electronic devices that help achieve logarithmic function are diodes and transistors. In a transistor, Vbe is related to Ic in a logarithmic way.

Output = -V_T ln(Input/I_s*R)

V_T  Thermal Voltage of the diode

 I_s    Saturation current in the diode

The reverse saturation current of the diode is temperature dependent.

Another logarithmic amplifier circuit with transistor is:

Some important points about logarithmic amplifier:

1. The gain of an ideal logarithmic amplifier approaches infinity as input approaches zero.

2. 

3. Change in output of logarithmic amplifier is the function of change in input voltage

3. Intercept voltage: The voltage at which the logarithmic value leads to zero. 

4. For smaller inputs, logarithmic amplifiers behave linear. The relation between input and output is linear.

Circuit by explanation: If i want to product of two analog signals, for suppose X and Y, we can do it using the below equation,

X * Y = Loginv(LOG(X)+Log(Y))

The above equation when represented in the form of block diagram, 

Application of logarithmic amplifiers:

1. Industrial circuits

     a. Process control

2. RF circuits

     a. Compression and decompression

     b. True RMS detection

Some vendors of logarithmic amplifiers used across different verticals of the industry are:

Texas Instruments - ADL5513 (Example of ic that is used in RF transmitter circuits)

Analog Devices - AD8307 (used in network and spectrum analyzers)

Maxim Integrated - MAX4206 (industrial applications)

Note: The reverse of logarithmic amplifier is anti-log amplifier where the non-linear signal is converted to linear signal.

High speed Designs - Part 1

A signal can be considered high speed, if the signal frequency that need be transmitted approaches 100MHz. There are many  parameters to decide if a signal can be considered high speed or not but let us for now consider 100MHz or greater frequency as high speed signal. When we talk in terms of bit rate it comes to 100Mbps if each cycle carries a single bit. as a straight forward definition, a signal can be treated as high speed if the speed is the major reason for the loss of the signal. Putting it the other way, the minimal frequency at which the signal starting degrading if improper care is not taken while routing it. All the frequencies above it are known as high speed frequencies. In another terms, frequency at which all the line parameters (R,L,C) are to be considered for analyzing the signal or the channel need to treated as transmission line can be called high speed signals.

                Routing a high speed signal is not so easy. There must be appropriate care taken starting from the PCB material selection to final routing stage. this implies from component selection, placement, stack up and routing each and every stage is critical in determining the quality of the board. We should take care that no signal integrity issues come up on the board. So, whether it is a high speed or low speed there are few factors that contribute to the loss of a signal on the PCB. The below are the list of items that are major contributors of loss in a PCB:

1. Package loss

2. Connector loss

3. Losses due to PCB traces (channel loss)

4. Losses due to via

The parasitics that the ic package introduces is the major contributor of losses. A package need to be treated as electrical model as such a model behavior need to be used in simulations. Consider, the electrical model of any ic (Ex: .ibis models), they list the R,L,C of the package pins. The Power distribution network of these ics and the modelling of these package connectivity is very crucial in signal integrity simulations.

Connectors are a must on any PCB to connect the board to the external world. Connectors are not always ideal. The characterization of the connector determines the accuracy of loss calculation. It is always preferable to select a low loss connector for high frequency designs.

The Channel loss or the PCB trace loss is due to 2 main factors: PCB material selection, PCB routing. The PCB material (dielectric material) is the crucial selection factor for high speed board designs. It is preferable to have a low loss dielectric for high speed signals. Also, narrower the PCB traces, higher the losses. Have as much wider trace as possible for lower losses. Again there is a trade-off between PCB material to be used, impedance of the board, width of the trace. The designer needs to make a careful selection to have a lowest loss signal.

Vias are one of the major loss on the PCB. Vias are the main reason for discontinuities on the board. The via type selection is vital at the preliminary stages of the high speed design. The types that can be used are blind via, buried via, micro via, differential vias.  Back drilling is used in some boards in case of micro vias to reduce losses. The via length in these cases is the major loss contributor. The return path for the signal path which has vias is very crucial for maintaining the integrity of the signal. If the vias are not laid properly, the introduced noise may cause substantial damage to the end product in use causing endless breakdowns. The via annular ring need to be designed after considering the amount of loss that is tolerated.

If you are working on high speed board, these PCB factors are very important and some designers calculate the loss budget with these parameters before proceeding with the manufacturing. Loss budget in these cases is the sum of the loss parameters (Connector loss, via losses, PCB trace losses, package parasitic losses) that we have talked of here.

Soldering Machines

This post is written on the request of one of the reader of our blog. thanks for the mail, it encourages us to write more articles when readers request for more.

Soldering is a process which is used to join two materials using a joint. The joint usually called a soldering material which has a lower melting point. Soldering machines are the tools used to do the soldering process. One more material used during the soldering process is the flux. Flux facilitates the soldering process. Soldering machines come in various shapes and sizes. It can be in the form of a gun or it can be in the form of a handle. A removable heat element at the tip of the machine facilitates soldering process. 

Temperature controlled or not?

The soldering machines are either temperature controlled or may be of fixed temperature. The temperature controlled soldering machines are a big set up and are commonly named soldering station. the soldering station is a combination of heat element, handle and a power supply regulation circuit. Soldering stations do have a display to read the tip temperature. A thermistor on the tip enables to read the temperature which is displayed on the screen.

Soldering iron power rating.

           Soldering machines are available in various power ratings. A machine with high power rating should not be used for minute joint soldering. That may damage the electronic components. Where as low power machines should be used for minute joints. the power ratings of the soldering machines range from 10-50W.

Soldering iron tip

Generally called a bit which can be detachable and comes in various sizes. The size is determined by the size of the joint that must be soldered. There are various tip sizes available. A slanted tip at the edge may have a more heat holding capability where as straight bits have less heat holding capability.

Various vendors who provide soldering machines:

METCAL

SOLDRON

ADVANCETECH

MAX TECHNOLOGY

METROQ

Wetting current (Sealing current)

Switches/Relays require some initial current to break the oxidation layer that is formed across the contacts. Supplying this amount of current helps the contact form reliably. The current supplied heats the oxide layer. This amount of current is obviously an additional burden on your power circuit but is the minimum current required to form a contact. Oxidation generally happens in humid conditions where the oxide layer is formed across the joints. The oxidation can generally be treated as resistance when you speak as an electrical engineer. The scenario of wetting current can be seen in the case of switches where you provide the stimulus but still doesn't turn up, where little more current would have been required there. Generally, in the humidity tests, these kind of issues come up on the board. The amount of whetting current depends on the material that is used for the contacts. For example, a gold plated contact may form a reliable contact with less wetting current. the two generic circuit parameters you may across in this scenario are punch through and stand-off voltage. Stand-off voltage is the minimum voltage that need to be provided for the oxide layer to break through. 

Dithering in circuits

Are you designing a board which requires agency certifications? Do you want to control any EMI/EMC concerns that are arising out of power supply section. One way to address your concerns is dithering of power supply. You might have taken proper concerns in layout but sometimes the power supply may be the source of noise in spite of extreme care taken in design. Dithering is nothing but a small electronic circuit to control the switching frequency of the power supply. The frequency spectrum of the oscillator can be spread to increase the band of frequency. Frequency spread meant distributing the total energy among the multiples of fundamental frequency. The dithering circuit is a simple op-amp circuit controlling the voltage into one of the frequency determining pin of the switching power supply. The voltage on this pin of switcher determines the frequency of operation of the switcher. Have you ever used a spectrum analyzer to probe a frequency generator in the circuit? If you try to probe the signal, you see a peak at the fundamental frequency of the switcher but if the signal is measured with dithering applied we can see the signal distributed over a band of frequencies. This technique can also be said as spread spectrum where the frequency is spread over a band.

PCB Routing guidelines - Part 1 (Power Supply)

Power supply design is one of the critical factor in circuit design. Designer may design a flawless design but if they don't give sufficient guidelines to the layout engineer or if the layout engineer doesn't follow the appropriate guidelines the whole effort to put in during the design phase may be wasted. Whether you are working with AC or DC, or whether you are working with linear supply or switching regulator, following the recommended guidelines is a must. The thermal performance, functional qualification, certification (EMI/EMC) depends on the proper layout of power supply also. Finally, a good stable power supply is a result of good layout design practices. We always have to 

remember that switching power supplies are the main sources of EMI in the circuits as they contain the switching elements. Based on the switching that is happening in the switching mode power supply the noise is either radiated or coupled to other circuits. 

The collection of layout guidelines that need to be followed by the layout engineer are listed below.

1. Have a separate plane for power and signals. 

2. Isolate the power and signal planes with continuous ground plane.

Note: For the above two points we are talking about the multi-layer boards.

3. The ground path loop should be as small as possible. 

4. Have a complete copper pour underneath the switcher/linear regulator and connect this to thermal pad. This helps to sink the heat to the PCB.

5. Placement is very critical in regulators. Placement must be in such a way that all the components should not be distributed randomly.

Note: For the above point reason is that the return current should not change direction.

6. Never try to connect the grounds in a daisy chaned way. The noise on one circuit may propogate to other easily. Try to use a star type routing for ground. 

7. Isolate the signal and power grounds and have a common node for connecting all together. 

8. Place the capacitors at the input and output of regulator as close as possible. 

Reason: The additional trace acts as inductor affecting the transient response of the switcher.

9. The grounding of the capacitor should be as close as possible to the supply regulator. Avoid longer ground traces. Having a lesser ground trace lengths help to eliminate the unnecessary ground loops.

10. The most important point to remember is that layout engineer should always know the amount of current that flows on the power traces. Correspondingly, the width of the must be layout. 

11. When there are via to connect different points of the circuit, have sufficient stitching via to support desired current.

12. The power trace connecting the various points should not be free flown. The length should be maintained as short as possible.

13. The board will have signal traces and power traces as well. Power traces should be maintained thicker to allow sufficient current to flow. Irrespective of lowest current limit, the power trace should be > 12mils always and further based on current flow, the width will change.

14. Switching regulators have a inductor at their output, take care that you don't route the low power traces near the inductor. 

15. The placement of digital circuit must be such a way that they should be placed away from the inductor.

Reason: The reason for the above two points is that inductors are the source of EMI on the boards.

16. The feedback path in the regulator is very critical to determine the output of regulator. Try to keep the resistive dividers in the feedback path as close as possible to the feedback pin. If not possible, route the feedback trace thicker. 

17. The feedback trace must be away from all the noisy paths. If required provide ground isolation to the feedback paths from other circuits/traces.

18. The components at the output of regulator (inductor, capacitor, schottky) should be placed as much closer as possible. 

19. Have a perfect ground plane around and underneath the regulator. This helps any EMI from the power circuit to ground directly.

What are the effects of bad layout? The effects of layout are more seen as the load current is more.

1. Desired regulation may not happen.It meant the output may vary from the desired output.

2. Too much noise at the output of the regulator.

3. Increases design iterations and hence increases project cost.

4. Has to have a good mechanical design to compensate for bad layout practices.

5. Ground bounce leading to improper ground reference.

6. Simultaneous switching noise affecting signal integrity.

"Free Synch" in displays

Refresh rate is one of the most important specification of monitors. Monitors often refresh their buffers at a standard rate. This for the displays is constant at 60Hz. But these days displays are coming up with different refresh rates which is going up to 120Hz. Also, that the refresh rate can be varied dynamically based on activities on the display. These days the graphics processors are becoming performance intensive with extreme stress on display technologies. the display should sync w.r.t graphics capability of processor else you may see monitor breaking down in extreme cases (like for example take the case of high end gaming). To eliminate this sync issues, AMD came with a new technology called free sync where the refresh rate of display can be varied as per the performance requirement. Let us assume a case where there is no activity on the display, in such a case refresh rate can be reduced to lowest, thus, helping in lower power consumption. Screen-tear is one of the problems seen in high end gaming where the screen is overlapped or occupied by the previous screen. Free sync is enabled on display port with capability of performing in extremely performance intensive applications. Most of the PC games demand change in frame rates and free sync helps to compensate as per demand. The older v-sync process can't be used here as the frame expectation is different from graphical processor and display technology.

        Free sync from AMD is similar to the G-sync from Nvidia. There is a compability issue here. To take advantage of G-sync both the display and GPU should have that technology. This doesn't mean that a G-sync can't be used with normal processors. R9 series from AMD is one example which has the Free sync technology. 

Latch Up

Have you ever faced a situation in which a component fails immediately after power up? or did you observe your circuit recovering after power cycle? Then you might have observed the latch up condition unknowingly. Latch up occurs when unintentional low impedance path is formed in the digital circuits of a integrated circuit. The integrated circuit is generally built with mosfet structures. So, most of the latch issues are seen in CMOS logic. The parasitic paths formed within the mosfet structure leads to high current and hence damage the mosfet.

To explain it more from the mosfet structure, latch is the generation of a low-impedance path in integrated chip between the power supply and the ground rails due to interaction of parasitic pnp and npn bipolar transistors. One has to remember that the circuit designer using CMOS logic integrated circuit can't avoid latch up as this can be eliminated only when integrated circuit physical design is done.

Have you tried power sequencing in a circuit, or tried power states in the board? During these conditions, we will try to power on/power off various circuits on the board. In that case, when signals are applied at the input of unpowered CMOS circuit, latch up occurs, where the unintentional current may be transferred. Latch up may also occur when the signals applied to a CMOS logic cross the power thresholds. 

Inrush current limit - Part 1

Are you expecting inrush current in your circuit? or have you heard you heard about the surge current? Have you ever dealt with surge current? Are you a beginner and don't know what component/circuit to use? Then after reading this article you must be able to decide after need to be done. Also, if we see our SMPS designs, inrush current limiter is commonly used.

             To start this discussion, let us take a scenario when we power on the circuit. Initially, there will be a surge current that flows. This is because of the capacitor bank that is present in the circuit which draw a significant current instantaneously to charge themselves. Also, we can put it the other way, when the current drawn by the load is greater than steady state current of the circuit, it is called surge current. Surge current may not be significant in some cases. This depends on the underlying circuitry used. If the surge current is of small duration such that the circuitry doesn't get affected by it, then we need not have any protection. Also, the affect of surge current may not be straight forward, it may reduce the life time of a component. The graph here shows the surge current drawn in a circuit over a time.

                 The tradition way of limiting the current is to use a fuse to limit the current. But if the current exceeds the fuse limit, then fuse blows off and only way to recover the circuit functionality is to replace the fuse with a new one. But this is a tedious job. One way to avoid fuse blow is to use some other circuit which handles the inrush current. Thermistor is one such component. we always use resistors in circuits to limit the current, for example, if we take the case of LED, it is always preferable to use a series resistor. But series resistor will not suffice if the inrush current is in amperes range and in fact the resistor may blow away. Also, resistors doesn't have the property to change their resistance unlike thermistor. Thermistors are better suited for these applications.

Thermistors are of type positive temperature co-efficient (PTC) and negative temperature co-efficient (NTC). NTC type are used as inrush current limiters. NTC thermistors are designed to be used in inrush limiter circuits. The principle of NTC is that resistance decreases with increase in temperature. so, initially, thermistor has very high resistance. As the current starts flowing, the resistance decreases as drop/temperature increases. 

     Using thermistor is also a cheaper option rather than having a complex circuitry (Active circuit) to limit the current. NTC is the most commonly used in the industry. 

General specifications to be checked while selecting a NTC/PTC as current limiter:

1. Resistance offered vs temperature 

2. Hold current (current at which thermistor provides low resistance)

3. Trip current (the current at which the thermistor offers high resistance)

4. Recovery time (for thermistor to come back to high resistance after the circuit has switched off)

Advantages of using thermistors:

1. Reliable

2. Stable

3. Lower cost

4. Lesser footprint

5. Easy to include in the circuit and easy to select

6. Longer life time

Some of the disadvantages of using inrush current protection:

1. When thermistor is used, there will be a voltage drop across it.

2. For a small form factor boards, with sizable power consumption (current draw by load), we need to include a bigger size thermistor which may be a limiting factor

3. High recovery time for thermistors.

Important points of thermistor as Inrush current limiter:

1. Resistance drops to milli ohms within in milliseconds

2. The resistance offered by thermistor during idle state will be in hundreds of ohms.

How to select the resistance of inrush current limiter?

Let us assume that we have a circuit with input voltage 12V and load current of 1A. In such cases, the value of thermistor is selected such that it allows min. 1A and cuts off above that current. So, here resistance if V/I = 12 ohms. So, have a thermistor of at least 12 ohms.